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| Programmer | Languages Used | ||||||
|---|---|---|---|---|---|---|---|
| 1 |
 Praveen Perera
|
2 hrs 26 mins | 36 mins | VHDL, SystemVerilog, Git Config, Makefile | hireable | 🇺🇸 | |
| 2 |
 @Ahhj93
|
2 hrs 1 min | 17 mins | Python, Markdown, VHDL, Stata | 🇫🇷 | ||
| 3 |
 Anonymous User
|
1 hr 52 mins | 1 hr 52 mins | VHDL, Tcl, TOML | 🇨🇦 | ||
| 4 |
 @comet99
|
12 mins | 2 mins | Rust, VHDL, TOML, Git Config, Protocol Buffer, Text, JSON | 🇺🇸 |
